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Post-doc in digital design for efficient embedded machine learning processors - Belgium  

Company managed [?] Still accepting applications

Posted on : 07 May 2017

Project Description

Project
  • Specifically, the project is currently looking for a PhD or post-doc to on resource-efficient digital implementations of machine learning processors, focused around Bayesian machine learning (and more general: Probablistic Graphical Models),deep learning, and reinforcement learning.
  • Recently deep neural networks, such as convolutional neural networks (CNNs) or long short-term memory (LSTM) network shave gained enormous popularity in the signal processing community. In themicro-elecronics research domain this has sprouted attention on customized processors for efficient embedded deep neural network inference. Our team has published several of these state-of-the-art processors over the past few years.
  • For the higher cognitive layers, where often sensor fusion takes place, a second machine learning paradigm is attractive: Bayesian learning and Probablistic Graphical Models. These techniques enable to more smoothly inject expert knowedge into the system, and reason about the sensed information. 
  • White such “white box” classifiers are attractive from a knowledge point of view compared to the “black box” deep neural networks, their execution is still very computationally intensive on traditional processors. And so far, no customized processors have been build for these workloads.
  • With this project, we want to enable the power of Probabilistic Graphical Models to embedded devices. 
  • This through custom processor design and hardware accelerator design for both online learning and inference tasks. 
  • This research will hence require a combination of algorithmic innovations (dealing with reinforcement learning and Probabilistic Graphical Models) and hardware innovations (processor design, low-power optimization and chip tape-out). 
  • We have already proven in the field of Deep Learning Processors, that such hardware/software co-optimization allows to save orders of magnitude on energy efficiency. With this project, we want to achieve similar gains for the next emerging deep learning technology beyond CNNs, DNNs,and RNNs, and enable the power of Probabilistic Graphical Models on embedded devices.
  •  In this project, we closely collaborate with researchers from university's machine learning group DTAI, as well as with UCLA’s machine learning group.


Profile
  • Candidates must hold a Masters degree in Electrical Engineering(or equivalent), with a background in digital design.
  • Additional research/educational experience in computer architectures, machine learning or chip tape out is a strong plus.
  • We are looking for a team player with the capability to work in an international research team.
  • Excellent proficiencyin the English language is also required, as well as good communication skills, both oral and written.



Offer
  • An exciting  research environment, working on the intersection between emerging research domains (machine learning; processor design; ultra-low power chip and system design).
  • A Ph.D. title from a highly-ranked university (after approximately 4 years of successful research).
  • A thorough scientific education, the possibility to become a world-class researcher.
  • A university affiliation, one of the largest research universities of Europe.
  • The possibility to participate in international conferences and collaborations.