Post-doc in digital design for efficient embedded machine learning processors - Belgium
- Specifically, the project is currently looking for a PhD or post-doc to on resource-efficient digital implementations of machine learning processors, focused around Bayesian machine learning (and more general: Probabilistic Graphical Models),deep learning, and reinforcement learning.
- Recently deep neural networks, such as convolution neural networks (CNNs) or long short-term memory (LSTM) networks have gained enormous popularity in the signal
- processing community. In the micro-electronics research domain this has sprouted attention on customized processors for efficient embedded deep neural networking
- Our team has published several of these state-of-the-art processorsover the past few years.
- For the highercognitive layers, where often sensor fusion takes place, a second machinelearning paradigm is attractive: Bayesian learning and Probablistic GraphicalModels.
- These techniques enable to more smoothly inject expert knowedge intothe system, and reason about the sensed information. White such “white box”classifiers are attractive from a knowledge point of view compared to the“black box” deep neural networks, their execution is still very computationallyintensive on traditional processors. And so far, no customized processors havebeen build for these workloads.
- With this project,we want to enable the power of Probabilistic Graphical Models to embedded devices.
- This through custom processor design and hardware accelerator design for both online learning and inference tasks.
- This research will hence require combination of algorithmic innovations (dealing with reinforcement learning probabilistic Graphical Models) and hardware innovations (processor design,low-power optimization and chip tape-out).
- We have already proven in the field of Deep Learning Processors, that such hardware/software co-optimization allows to save orders of magnitude on energy efficiency.
- With this project, we want to achieve similar gains for the next emerging deep learning technology beyond CNNs, DNNs, and RNNs, and enable the power of Probablistic Graphical Models on embedded devices. In this project, we closely collaborate with researchers from our university’s machine learning group DTAI, as well as with UCLA’s machine learning group.
- Candidates must hold a PhD degree in Electrical Engineering(or equivalent), with background in digital design or processor design.
- Additional research/educational experience in computer architectures, machine learning and chip tape out are a strong plus.
- We are looking for a team player with the capability to work in an international research team.
- Excellent proficiency in the English languages also required, as well as good communication skills, both oral and written.
- An exciting research environment,working on the intersection between emerging research domains (machine learning;processor design; ultra-low power chip and system design)
- The ability to closely interact with our industrial partners, as well as many academic research partners in ongoing projects
- A thorough scientific education,the possibility to become a world-class researcher
- The possibility to participate in international conference sand collaborations