BrightOwl Loader Loading

FPGA Firmware Developer (1-year contract) - Germany  

Company managed [?] Still accepting applications
2 Facebook  Linkedin

Posted on : 27 August 2017

Project Description

To strengthen our Development team in the Electronics Development/Electronics Design area at the SMT business group site in Oberkochen, we are seeking a

FPGA Firmware Developer (1-year contract)

Your job

  • Develop innovative FPGA firmware that will help bring to life tomorrow’s microelectronics in future lithography optics
  • Help design embedded systems on chips (SoCs) on FPGA technology
  • Establish and coordinate the requirements and interfaces for your design
  • Document your ideas with a view to creating firmware that meets the relevant requirements
  • Analyze the quality of firmware developments using your verification expertise
  • Work on challenging projects as part of highly qualified, interdisciplinary teams

Our requirements

  • A very good degree in electrical engineering, computer engineering or similar
  • An excellent knowledge of digital circuit technology
  • Excellent, verified skills in VHDL and the FPGA technologies from Intel and Xilinx
  • Experience in developing firmware for FPGA-based divided systems and systems on chips (SoCs)
  • Knowledge of microcontroller programming and control engineering
  • A high degree of initiative, dedication and commitment coupled with an independent and systematic work ethic
  • No problem communicating in German and English, and enjoy doing so

With more than 25,000 employees, ZEISS is one of the global leaders in the optical and optoelectronic industries and has been contributing to technological progress for 170 years. ZEISS develops and distributes lithography optics, measuring technology, microscopes, medical technology, eyeglass lenses, camera and cine lenses, binoculars and planetarium technology.

If you are interested in this position, please send us your application using the link at the bottom of this page, indicating your earliest possible entry date.